STA sign-off no longer works for advanced designs below 16nm and IOT designs where designs have low yield due to inaccurate timing and too much power and area cost by extra margin. Empyrean-XTime is the answer those problems.
• Enable SPICE Monte Carlo accuracy timing signoff for critical paths.
• Improve design PPA and yield for advanced process and ultra low power designs (IoT).
• Reduce the efforts and TAT of timing closure.
• Pinpoint design bottlenecks with advanced big data analysis.
• Timing paths SPICE signoff
• Fast Monte Carlo critical path analysis
• Design margin recovery
• V/T sweeping for low power limitation and sensitivity analysis
• Seamless integration with ICExplorer-Top