The verification of analog design is becoming extremely important at an advanced node, but it’s very time-consuming in post-layout simulation because of a more complex device model, exponentially growing parasitics and more signoff corners. A traditional SPICE may take weeks or even months to run a postlayout simulation.
Empyrean ALPS-GT is a heterogeneous simulation system based on CPU-GPU architecture. Compared with CPU architecture, it provides more computing resources and greatly improves the performance of SPICE simulation. Empyrean ALPS-GT can greatly improve the efficiency of simulation verification, especially for designs using advanced processes.