Empyrean RCExplorer

The parasitic effect on circuit performance becomes challenging in modern analog IC design. Empyrean RCExplorer performs cell-level and transistor-level parasitic extraction. Empyrean RCExplorer also provides a quick analysis of point-to-point parasitic and delay based on layout and netlist. It can be seamlessly integrated with schematic and layout editor Empyrean Aether and enable postlayout simulation with Empyrean ALPS.