RCExplorer offers fast, in-design, pre-LVS and post-extraction parasitic analysis. This includes DSPF/SPEF-based pin-to-pin and point-to-point analyses. Also supported is interactive, layout-based point-to-point interconnect parasitic analysis.


  • Shortens design cycles using in-design, pre-LVS parasitic analysis
  • Reduces post-extraction parasitic analysis from days to minutes


  • Interconnect analysis—batch and interactive modes
  • DSPF/SPEF-based interconnect analysis and comparisons
  • Pin-to-pin interconnect analysis—resistance, capacitance, and delay
  • Layout based point-to-point resistance analysis
  • Handles large RC networks like power mesh
  • Interconnect calculator for RC estimation