At the advanced node, the traditional timing sign-off solution of corner-based static timing analysis is facing great challenges. Process effects, like the Miller Effect and the Long Tail Effect, have a serious impact on timing performance, resulting in a larger discrepancy between the STA calculation data and the actual silicon measurement. For low voltage design, dynamic voltage and frequency scaling (DVFS) scheme, a new solution is needed to analyze the performance of the design across the entire PVT and RC variation space. Advanced process node’s non-Gaussian distribution of process variations is more pronounced at low voltages. While STA tools may incorporate more sophisticated models such as AOCV/POCV/LVF to characterize variation effects, they still incur excessive pessimism or incomplete coverage.
Empyrean XTime™ provides a timing-based SPICE accurate process analysis solution, to perfectly solve the accuracy problem between STA and silicon for advanced process nodes, 16-nm and beyond. It can help Foundry to build up the Ring Oscillator flow for process analysis easily. The built-in V/T sweep function automatically analyzes the sensitivity of timing paths to voltage and temperature variation. Fast Monte-Carlo simulations provide an efficient and accurate process variation analysis. If the process result is not as good as expected, XTime can provide guidance for process optimization.