• One-stop solution for test key design – device testing, model extraction and model verification.
  • Provides device modeling solutions for CMOS, BiCMOS, SOI, III-V material and discrete devices.
  • Supports technology nodes from 0.35um down to 12nm FinFET
  • Supported device characteristics: I-V curve, capacitance, temperature, small/large-signal response, 1/f noise, thermal noise, and device reliability
  • Provides EDA tools for the entire model extraction flow
  • Provides customized model development and model extraction for devices using special material
  • Allows transfer of model extraction technology for in-house model development.