The Design Automation Conference, the premier conference for electronic design automation, will take place on June 24-28 in San Francisco, USA. Empyrean Software invites you to visit our booth at #1449.   

Empyrean, a leading vendor of quality solutions to enhance PPA, improve yield and reduce TAT will highlight technology breakthroughs in True-Spice circuit simulationClock Tree analysis, constraint validation and optimization; high speed high capacity GDSII/OASIS analysis; and Lib/IP validation & QA.  Here are some select products you will want on your radar 

ALPS 

  •     True SPICE parallel circuit simulator, boosted by smart matrix solver technology, 5-10X speed up for post-layout simulation, top-choice for applications requiring high accuracy and quick TAT

Clock Explorer 

  •     CTS analysis and diagnostic platform facilitating efficient collaboration between front end and back end design teams to significantly reduce CTS iterations

Skipper 

  •      Large scale layout data processing platform.  Speedup the process of chip finishing and chip failure analysis.

Please contact us at info@empyrean-tech.com to arrange for a private presentation of products and capabilities.  

Looking forward to seeing you at DAC 2018 in San Francisco! 

Venue: San Francisco Moscone Convention Center
Date: Monday-Wednesday, June 25th-27th, 2018
Time: 10:00am to 6:00pm