As process technologies advance, manufacturing complexity continues to increase. A robust technology enablement platform becomes increasingly critical for improving manufacturing yield and establishing a reliable IC design flow. To support the process and IP design needs of semiconductor foundries, Empyrean delivers a comprehensive portfolio of process and IP enablement technologies.

The foundry enablement suite spans device modeling, IP development, physical implementation enablement, and mask composition:

Device modeling

• Device model extraction: Empyrean XModel

• IBIS modeling: Empyrean Demeter

IP development

• Standard cell library characterization:  Empyrean Liberal

• Memory characterization: Empyrean Liberal-Mem

• Mixed-signal IP characterization: Empyrean Liberal-IP

• Standard cell library and IP validation: Empyrean Qualib

• Memory compiler: Empyrean SMCB 

Physical Implementation enablement

• Layout integration and analysis: Empyrean Skipper

Mask composition

• Mask composition:  Empyrean Mage

The foundry enablement portfolio includes foundry-specific capabilities such as device modeling and mask data preparation, which are not addressed by other application domains:
 

• Empyrean Demeter provides a complete solution across IBIS modeling steps, including IBIS model extraction, integrated, syntax check and accuracy verification.  The applications cover various buffers, dynamic random-access memory, SerDes, AD/DA converter, etc.
   

• Empyrean Mage provides a comprehensive and efficient solution for lithography mask composition and design. It is capable of composing a large number of chips into a single maximum exposure area of the lithography machine, thereby reducing exposure times and machine wear and tear and optimizing wafer layout to achieve the highest wafer utilization.