Comprehensive solutions for AMS and PMIC designs

Schematic and Layout Design Environment
Empyrean Aether™ is an analog IC design platform that seamlessly integrates schematic and layout editing with the Empyrean ALPS^® SPICE simulator, the Empyrean Argus™ physical verification tool, the Empyrean RCExplorer™ parasitic RC extraction tool,  and the Empyrean Polas™ reliability analysis tool.

Simulation and EM/IR
Empyrean ALPS^® is a high-performance parallel SPICE simulator and an ideal solution for large-scale post-layout circuit simulation. Empyrean ALPS^® GT is a heterogeneous SPICE simulator that leverages both CPUs and GPUs for acceleration. It further enhances post-layout circuit simulation performance, helping designers shorten their design cycles.

Empyrean Patron™ is a transistor-level power integrity analysis tool for analog IC designs.

RC Extraction and Analysis
Empyrean RCExplorer™ supports transistor-level and standard-cell-level post-layout extraction for analog designs. It also supports point-to-point RC and timing delay analysis.

Empyrean ADA™ is a DSPF-based RC analysis tool with cross-referenced layout visualization capability.

Physical Verification
Empyrean Argus™ is a physical verification tool that delivers DRC and LVS verification, helping improve both verification quality and efficiency.

PMIC Solution
Empyrean Polas™ is a reliability analysis solution for Power IC layouts.